Техническая Спецификация для Microchip Technology ARD00385
PIC18F87K90 FAMILY
DS39957D-page 348
2009-2011 Microchip Technology Inc.
TABLE 21-4:
REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on Page:
INTCON
GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
PIR1
—
ADIF
RC1IF
TX1IF
SSP1IF
TMR1GIF
TMR2IF
TMR1IF
PIE1
—
ADIE
RC1IE
TX1IE
SSP1IE
TMR1GIE
TMR2IE
TMR1IE
IPR1
—
ADIP
RC1IP
TX1IP
SSP1IP
TMR1GIP
TMR2IP
TMR1IP
PIR2
OSCFIF
—
SSP2IF
BLC2IF
BCL1IF
HLVDIF
TMR3IF
TMR3GIF
PIE2
OSCFIE
—
SSP2IE
BLC2IE
BCL1IE
HLVDIE
TMR3IE
TMR3GIE
IPR2
OSCFIP
—
SSP2IP
BLC2IP
BCL1IP
HLVDIP
TMR3IP
TMR3GIP
PIR3
TMR5GIF
LCDIF
RC2IF
TX2IF
CTMUIF
CCP2IF
CCP1IF
RTCCIF
PIE3
TMR5GIE
LCDIE
RC2IE
TX2IE
CTMUIE
CCP2IE
CCP1IE
RTCCIE
IPR3
TMR5GIP
LCDIP
RC2IP
TX2IP
CTMUIP
CCP2IP
CCP1IP
RTCCIP
TRISC
TRISC7
TRISC6
TRISC5
TRISC4
TRISC3
TRISC2
TRISC1
TRISC0
TRISD
TRISD7
TRISD6
TRISD5
TRISD4
TRISD3
TRISD2
TRISD1
TRISD0
SSP1BUF
MSSP1 Receive Buffer/Transmit Register
SSP1ADD
MSSP1 Address Register (I
2
C™ Slave mode),
MSSP1 Baud Rate Reload Register (I
2
C Master mode)
SSP1MSK
)
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
—
SSP1CON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
SSP1CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
GCEN
ACKSTAT ADMSK5
)
ADMSK4
ADMSK3
)
ADMSK2
)
ADMSK1
)
SEN
SSP1STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
SSP2BUF
MSSP2 Receive Buffer/Transmit Register
SSP2ADD
MSSP2 Address Register (I
2
C Slave mode),
MSSP2 Baud Rate Reload Register (I
2
C Master mode)
SSP2MSK
)
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
—
SSP2CON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
SSP2CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN
SEN
GCEN
ACKSTAT ADMSK5
)
ADMSK4
ADMSK3
)
ADMSK2
)
ADMSK1
)
SEN
SSP2STAT
SMP
CKE
D/A
P
S
R/W
UA
BF
Legend:
— = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I
2
C™ mode.
Note 1:
SSPxMSK shares the same address in SFR space as SSPxADD, but is only accessible in certain I
2
C™
Slave operating modes in 7-Bit Masking mode. See
for
more details.
2:
Alternate bit definitions for use in I
2
C Slave mode operations only.