Техническая Спецификация для Microchip Technology AC244045

Скачать
Страница из 302
© 2009 Microchip Technology Inc.
DS41341E-page 115
PIC16F72X/PIC16LF72X
12.0
TIMER1 MODULE WITH GATE 
CONTROL
The Timer1 module is a 16-bit timer/counter with the
following features:
• 16-bit timer/counter register pair (TMR1H:TMR1L)
• Programmable internal or external clock source
• 3-bit prescaler
• Dedicated LP oscillator circuit
• Synchronous or asynchronous operation
• Multiple Timer1 gate (count enable) sources
• Interrupt on overflow
• Wake-up on overflow (external clock, 
Asynchronous mode only)
• Time base for the Capture/Compare function
• Special Event Trigger (with CCP)
• Selectable Gate Source Polarity
• Gate Toggle Mode
• Gate Single-pulse Mode
• Gate Value Status
• Gate Event Interrupt
Figure 12-1 is a block diagram of the Timer1 module.
FIGURE 12-1:
TIMER1 BLOCK DIAGRAM   
TMR1H
TMR1L
T1SYNC
T1CKPS<1:0>
Prescaler
1, 2, 4, 8
0
1
Synchronized
clock input
2
Set flag bit
TMR1IF on
Overflow
TMR1
(2)
TMR1ON
Note 1: ST Buffer is high speed type when using T1CKI.
2: Timer1 register increments on rising edge.
3: Synchronize does not operate while in Sleep.
T1G
T1OSC
F
OSC
/4
Internal
Clock
T1OSO/T1CKI
T1OSI
T1OSCEN
1
0
T1CKI
TMR1CS<1:0>
(1)
Synchronize
(3)
det
Sleep input
TMR1GE
0
1
00
01
10
11
From Timer0 
From Timer2
T1GPOL
D
Q
CK
Q
0
1
T1GVAL
T1GTM
Single Pulse
Acq. Control
T1GSPM
T1GGO/DONE
T1GSS<1:0>
EN
OUT
10
11
00
01
F
OSC
Internal
Clock
Cap. Sensing
From WDT
Overflow
Match PR2
Overflow
R
D
EN
Q
Q1
RD
T1GCON
Data Bus
det
Interrupt
TMR1GIF
Set
T1CLK
F
OSC
/2
Internal
Clock
D
EN
Q
T1G_IN
TMR1ON
Oscillator