Справочник Пользователя для Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256
Модели
DEMO9S12XHY256
Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
112
Freescale Semiconductor
2.3.40
Port P Input Register (PTIP)
2.3.41
Port P Data Direction Register (DDRP)
Address 0x0259
Access: User read
1
1
Read: Anytime.
Write:Never, writes to this register have no effect.
Write:Never, writes to this register have no effect.
7
6
5
4
3
2
1
0
R
PTIP7
PTIP6
PTIP5
PTIP4
PTIP3
PTIP2
PTIP1
PTIP0
W
Reset
u
u
u
u
u
u
u
u
= Unimplemented or Reserved
u = Unaffected by reset
Figure 2-37. Port P Input Register (PTIP)
Table 2-32. PTIP Register Field Descriptions
Field
Description
7-0
PTIP
Port P input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
Address 0x025A
Access: User read/write
1
1
Read: Anytime.
Write: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
DDRP7
DDRP6
DDRP5
DDRP4
DDRP3
DDRP2
DDRP1
DDRP0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-38. Port P Data Direction Register (DDRP)