Manualsbrain.com
  1. Инструкции и руководства
  2. Бренды
  3. Freescale Semiconductor
  4. Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256
  5. Справочник Пользователя

Справочник Пользователя для Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256

Модели
DEMO9S12XHY256
Скачать
Страница из 924
Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
146
Freescale Semiconductor
2.3.91
Port V Data Direction Register (DDRV)
Table 2-74. PTIV Register Field Descriptions
Field
Description
7-0
PTIV
Port V input data—
This register always reads back the buffered state of the associated pins. This can also be used to detect overload
or short circuit conditions on output pins.
 Address 0x029A
Access: User read/write
1
1
Read: Anytime.
Write: Anytime.
7
6
5
4
3
2
1
0
R
DDRV7
DDRV6
DDRV5
DDRV4
DDRV3
DDRV2
DDRV1
DDRV0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-88. Port V Data Direction Register (DDRV)
Table 2-75. DDRV Register Field Descriptions
Field
Description
7
DDRV
Port V data direction—
If enabled the Motor driver PWM output it will force the I/O state to be output.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
6
DDRV
Port V data direction—
If enabled the Motor driver PWM output or enable the TIM1 channel 3 output compare function, it will force the I/O
state to be output.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
5
DDRV
Port V data direction—
If enabled the Motor driver PWM output it will force the I/O state to be output.
1 Associated pin is configured as output.
0 Associated pin is configured as input.
4
DDRV
Port V data direction—
If enabled the Motor driver PWM output or enable the TIM1 channel 2 output compare function, it will force the I/O
state to be output.
1 Associated pin is configured as output.
0 Associated pin is configured as input.