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Memory Mapping Control (S12XMMCV4)
MC9S12XHY-Family Reference Manual, Rev. 1.04
160
Freescale Semiconductor
Figure 3-1. MMC Block Diagram
3.2
External Signal Description
The user is advised to refer to the SoC Guide for port configuration and location of external bus signals.
Some pins may not be bonded out in all implementations.
 outlines the pin names and functions. It also provides a brief description of their operation.
Table 3-2. External Input Signals Associated with the MMC
Signal
I/O
Description
Availability
MODC
I
Mode input
Latched after
RESET (active low)
CPU
BDM
Target Bus Controller
DBG
MMC
Address Decoder & Priority
Peripherals
PGMFLASH
Data FLASH
RAM