Справочник Пользователя для Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256
Модели
DEMO9S12XHY256
Freescale’s Scalable Controller Area Network (S12MSCANV3)
MC9S12XHY-Family Reference Manual, Rev. 1.04
340
Freescale Semiconductor
11.1.1
Glossary
11.1.2
Block Diagram
Figure 11-1. MSCAN Block Diagram
Table 11-2. Terminology
ACK
Acknowledge of CAN message
CAN
Controller Area Network
CRC
Cyclic Redundancy Code
EOF
End of Frame
FIFO
First-In-First-Out Memory
IFS
Inter-Frame Sequence
SOF
Start of Frame
CPU bus
CPU related read/write data bus
CAN bus
CAN protocol related serial bus
oscillator clock
Direct clock from external oscillator
bus clock
CPU bus related clock
CAN clock
CAN protocol related clock
RXCAN
TXCAN
Receive/
Transmit
Engine
Message
Filtering
and
Buffering
Control
and
Status
Wake-Up Interrupt Req.
Errors Interrupt Req.
Receive Interrupt Req.
Transmit Interrupt Req.
CANCLK
Bus Clock
Configuration
Oscillator Clock
MUX
Presc.
Tq Clk
MSCAN
Low Pass Filter
Wake-Up
Registers