Справочник Пользователя для Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256
Модели
DEMO9S12XHY256
Freescale’s Scalable Controller Area Network (S12MSCANV3)
MC9S12XHY-Family Reference Manual Rev. 1.04
Freescale Semiconductor
361
NOTE
Reading this register when in any other mode other than sleep or
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
functionality.
11.3.2.16 MSCAN Transmit Error Counter (CANTXERR)
This register reflects the status of the MSCAN transmit error counter.
NOTE
Reading this register when in any other mode other than sleep or
initialization mode, may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
initialization mode, may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
functionality.
Module Base + 0x000E
Access: User read/write
(1)
1. Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
Write: Unimplemented
7
6
5
4
3
2
1
0
R
RXERR7
RXERR6
RXERR5
RXERR4
RXERR3
RXERR2
RXERR1
RXERR0
W
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 11-18. MSCAN Receive Error Counter (CANRXERR)
Module Base + 0x000F
Access: User read/write
(1)
1. Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and INITAK = 1)
Write: Unimplemented
7
6
5
4
3
2
1
0
R
TXERR7
TXERR6
TXERR5
TXERR4
TXERR3
TXERR2
TXERR1
TXERR0
W
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 11-19. MSCAN Transmit Error Counter (CANTXERR)