Справочник Пользователя для Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256

Модели

DEMO9S12XHY256

Serial Peripheral Interface (S12SPIV5)

MC9S12XHY-Family Reference Manual Rev. 1.04

Freescale Semiconductor

503

Figure 15-9. Reception with SPIF serviced in Time

Figure 15-10. Reception with SPIF serviced too late

15.4

Functional Description

The SPI module allows a duplex, synchronous, serial communication between the MCU and peripheral
devices. Software can poll the SPI status flags or SPI operation can be interrupt driven.

The SPI system is enabled by setting the SPI enable (SPE) bit in SPI control register 1. While SPE is set,
the four associated SPI port pins are dedicated to the SPI function as:

•

Slave select (SS)

•

Serial clock (SCK)

•

Master out/slave in (MOSI)

•

Master in/slave out (MISO)

Receive Shift Register

SPIF

SPI Data Register

Data A

Data B

Data A

Data A Received

Data B Received

Data C

SPIF Serviced

Data C Received

Data B

= Unspecified

= Reception in progress

Receive Shift Register

SPIF

SPI Data Register

Data A

Data B

Data A

Data A Received

Data B Received

Data C

SPIF Serviced

Data C Received

Data B Lost

= Unspecified

= Reception in progress