Справочник Пользователя для Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256

Freescale Semiconductor

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The LCD40F4BV2 driver module has 40 frontplane drivers and 4 backplane drivers so that a maximum of
160 LCD segments are controllable. Each segment is controlled by a corresponding bit in the LCD RAM.
Four multiplex modes (1/1, 1/2, 1/3, 1/4 duty), and three bias (1/1, 1/2, 1/3) methods are available. The V

0

voltage is the lowest level of the output waveform and V

3

 becomes the highest level. All frontplane and

backplane pins can be multiplexed with other port functions.

The LCD40F4BV2 driver system consists of five major sub-modules:

•

Timing and Control – consists of registers and control logic for frame clock generation, bias
voltage level select, frame duty select, backplane select, and frontplane select/enable to produce
the required frame frequency and voltage waveforms.

•

LCD RAM – contains the data to be displayed on the LCD. Data can be read from or written to the
display RAM at any time.

•

Frontplane Drivers – consists of 40 frontplane drivers.

•

Backplane Drivers – consists of 4 backplane drivers.

•

Voltage Generator – Based on voltage applied to VLCD, it generates the voltage levels for the
timing and control logic to produce the frontplane and backplane waveforms.

01.00

26-Jul-00

initial LCD module spec

01.08

27-Mar-08

New specification for 9S12HY family based on 9S12H family specification

01.09

25-Apr-08

Update for 9S12HY defining last registers as unimplemented

02.01

29-Jul-09

add pseudo stop feature