Техническая Спецификация для Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT

Модели

TWR-S12GN32-KIT

MC9S12G Family Reference Manual, Rev.1.23

Freescale Semiconductor

157

Chapter 2
Port Integration Module (S12GPIMV1)

Revision History

2.1

Introduction

This section describes the S12G-family port integration module (PIM) in its configurations depending on
the family devices in their available package options.

It is split up into two parts, firstly determining the routing of the various signals to the available package
pins (“PIM Routing”) and secondly describing the general-purpose port related logic (“PIM Ports”).

2.1.1

Glossary

Table 2-1. Glossary Of Terms

Rev. No.

(Item No.)

Date

(Submitted By)

Sections

Affected

Substantial Change(s)

V01.01

01 Dec 2010

Table 2-4
Table 2-5
Table 2-8

Table 2-16
Table 2-17

• Removed TXD2 and RXD2 from PM1 and PM0 for G64
• Simplified input buffer control description on port C and AD
• Corrected DAC signal priorities on pins PAD10 and PAD11 with shared

AMP and DACU output functions

V01.02

30 Aug 2011

• Corrected PIFx descriptions

V01.03

15 Mar 2012

Table 2-2./2-1

Table 2-4./2-1