Техническая Спецификация для Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT
Модели
TWR-S12GN32-KIT
Port Integration Module (S12GPIMV1)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
255
the ETRIG will be driven by the PWM internally. If the related PWM channel is not enabled, the ETRIG
function will be triggered by other functions on the pin including general-purpose input.
function will be triggered by other functions on the pin including general-purpose input.
illustrates the resulting trigger sources and their dependencies. Shaded fields apply to 20
TSSOP with shared ACMP analog input functions on port AD pins only.
2.6.5
Emulation of Smaller Packages
The
allows the emulation of smaller packages to support software
development and debugging without need to have the actual target package at hand. Cross-device
programming for the shared functions is also supported because smaller package sizes than the given
device is offered in can be selected
programming for the shared functions is also supported because smaller package sizes than the given
device is offered in can be selected
1
.
The PKGCR can be written in normal mode once after reset to overwrite the factory pre-programmed
value, which determines the actual package. Further attempts are blocked to avoid inadvertent changes
(blocking released in special mode). Trying to select a package larger than the given device is offered in
will be ignored and result in the “illegal” code being written.
value, which determines the actual package. Further attempts are blocked to avoid inadvertent changes
(blocking released in special mode). Trying to select a package larger than the given device is offered in
will be ignored and result in the “illegal” code being written.
When a smaller package is selected the pin availability and pin functionality changes according to the
target package specification. The input buffers of unused pins are disabled however the output functions
of unused pins are not disabled. Therefore these pins should be don’t-cared.
target package specification. The input buffers of unused pins are disabled however the output functions
of unused pins are not disabled. Therefore these pins should be don’t-cared.
Depending on the different feature sets of the G-family derivatives the input buffers of specific pins, which
are shared with analog functions need to be explicitly enabled before they can be used with digital input
functions. For example devices featuring an ACMP module contain a control register for the related input
buffers, which is not available on other family members. Also larger devices in general feature more ADC
channels with individual input buffer enable bits, which are not present on smaller ones. These differences
need to be accounted for when developing cross-functional code.
are shared with analog functions need to be explicitly enabled before they can be used with digital input
functions. For example devices featuring an ACMP module contain a control register for the related input
buffers, which is not available on other family members. Also larger devices in general feature more ADC
channels with individual input buffer enable bits, which are not present on smaller ones. These differences
need to be accounted for when developing cross-functional code.
Table 2-94. ETRIG Sources
Port AD Input
Buffer Enable
1
1
Refer to
for enable condition
PWM
Enable
Peripheral
Enable
2
2
With higher priority than PWM on pin including ACMP enable (ACMPC[ACE]=1)
ETRIG
Source
Comment
0
0
0
Const. 1
Forced High
0
0
1
Const. 1
Forced High
0
1
0
PWM
Internal Link
0
1
1
PWM
Internal Link
1
0
0
Pin
Driven by General-Purpose Function
1
0
1
Pin
Driven by Peripheral
1
1
0
Pin
Driven by PWM
1
1
1
PWM
Internal Link
1. Except G(A)128/G(A)96 in 20 TSSOP: Internal routing of PWM to ETRIG is not available.