Техническая Спецификация для Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT
Модели
TWR-S12GN32-KIT
Background Debug Module (S12SBDMV1)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
293
7.3.2.1
BDM Status Register (BDMSTS)
Figure 7-3. BDM Status Register (BDMSTS)
Read: All modes through BDM operation when not secured
Write: All modes through BDM operation when not secured, but subject to the following:
— ENBDM should only be set via a BDM hardware command if the BDM firmware commands
are needed. (This does not apply in special single chip mode).
— BDMACT can only be set by BDM hardware upon entry into BDM. It can only be cleared by
the standard BDM firmware lookup table upon exit from BDM active mode.
0x3_FF08
BDMPPR
R
BPAE
0
0
0
BPP3
BPP2
BPP1
BPP0
W
0x3_FF09
Reserved
R
0
0
0
0
0
0
0
0
W
0x3_FF0A
Reserved
R
0
0
0
0
0
0
0
0
W
0x3_FF0B
Reserved
R
0
0
0
0
0
0
0
0
W
Register Global Address 0x3_FF01
7
6
5
4
3
2
1
0
R
0
0
0
W
Reset
Special Single-Chip Mode
0
1
1
ENBDM is read as 1 by a debugging environment in special single chip mode when the device is not secured or secured but
fully erased (Flash). This is because the ENBDM bit is set by the standard BDM firmware before a BDM command can be fully
transmitted and executed.
fully erased (Flash). This is because the ENBDM bit is set by the standard BDM firmware before a BDM command can be fully
transmitted and executed.
1
0
0
0
0
0
2
2
UNSEC is read as 1 by a debugging environment in special single chip mode when the device is secured and fully erased,
else it is 0 and can only be read if not secure (see also bit description).
else it is 0 and can only be read if not secure (see also bit description).
0
All Other Modes
0
0
0
0
0
0
0
0
= Unimplemented, Reserved
= Implemented (do not alter)
0
= Always read zero
Global
Address
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
= Unimplemented, Reserved
= Implemented (do not alter)
X
= Indeterminate
0
= Always read zero
Figure 7-2. BDM Register Summary (continued)