Техническая Спецификация для Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT

Freescale Semiconductor

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If the value of T8 is the same as in the previous transmission, T8 does not
have to be rewritten.The same value is transmitted until T8 is rewritten

In 8-bit data format, only SCI data register low (SCIDRL) needs to be
accessed.

When transmitting in 9-bit data format and using 8-bit write instructions,
write first to SCI data register high (SCIDRH), then SCIDRL.

This section provides a complete functional description of the SCI block, detailing the operation of the
design from the end user perspective in a number of subsections.

   shows the structure of the SCI module. The SCI allows full duplex, asynchronous, serial

communication between the CPU and remote devices, including other CPUs. The SCI transmitter and
receiver operate independently, although they use the same baud rate generator. The CPU monitors the
status of the SCI, writes the data to be transmitted, and processes received data.

SCIDRH

7

R8

Received Bit 8 — R8 is the ninth data bit received when the SCI is configured for 9-bit data format (M = 1).

SCIDRH

6

T8

Transmit Bit 8 — T8 is the ninth data bit transmitted when the SCI is configured for 9-bit data format (M = 1).

SCIDRL

7:0

R[7:0]

T[7:0]

R7:R0 — Received bits seven through zero for 9-bit or 8-bit data formats
T7:T0 — Transmit bits seven through zero for 9-bit or 8-bit formats