Техническая Спецификация для Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT
Модели
TWR-S12GN32-KIT
Timer Module (TIM16B8CV3)
MC9S12G Family Reference Manual,
Rev.1.23
756
Freescale Semiconductor
23.3.2
Register Descriptions
This section consists of register descriptions in address order. Each description includes a standard register
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
diagram with an associated figure number. Details of register bit and field function follow the register
diagrams, in bit order.
Only bits related to implemented channels are valid.
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x0000
TIOS
R
IOS7
IOS6
IOS5
IOS4
IOS3
IOS2
IOS1
IOS0
W
0x0001
CFORC
R
0
0
0
0
0
0
0
0
W
FOC7
FOC6
FOC5
FOC4
FOC3
FOC2
FOC1
FOC0
0x0002
OC7M
R
OC7M7
OC7M6
OC7M5
OC7M4
OC7M3
OC7M2
OC7M1
OC7M0
W
0x0003
OC7D
R
OC7D7
OC7D6
OC7D5
OC7D4
OC7D3
OC7D2
OC7D1
OC7D0
W
0x0004
TCNTH
R
TCNT15
TCNT14
TCNT13
TCNT12
TCNT11
TCNT10
TCNT9
TCNT8
W
0x0005
TCNTL
R
TCNT7
TCNT6
TCNT5
TCNT4
TCNT3
TCNT2
TCNT1
TCNT0
W
0x0006
TSCR1
TSCR1
R
TEN
TSWAI
TSFRZ
TFFCA
PRNT
0
0
0
W
0x0007
TTOV
R
TOV7
TOV6
TOV5
TOV4
TOV3
TOV2
TOV1
TOV0
W
0x0008
TCTL1
R
OM7
OL7
OM6
OL6
OM5
OL5
OM4
OL4
W
0x0009
TCTL2
R
OM3
OL3
OM2
OL2
OM1
OL1
OM0
OL0
W
0x000A
TCTL3
R
EDG7B
EDG7A
EDG6B
EDG6A
EDG5B
EDG5A
EDG4B
EDG4A
W
0x000B
TCTL4
R
EDG3B
EDG3A
EDG2B
EDG2A
EDG1B
EDG1A
EDG0B
EDG0A
W
0x000C
TIE
R
C7I
C6I
C5I
C4I
C3I
C2I
C1I
C0I
W
0x000D
TSCR2
R
TOI
0
0
0
TCRE
PR2
PR1
PR0
W
0x000E
TFLG1
R
C7F
C6F
C5F
C4F
C3F
C2F
C1F
C0F
W
0x000F
TFLG2
R
TOF
0
0
0
0
0
0
0
W
0x0010–0x001F
TCxH–TCxL
1
R
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
W
R
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
W
0x0020
PACTL
R
0
PAEN
PAMOD
PEDGE
CLK1
CLK0
PAOVI
PAI
W
Figure 23-5. TIM16B8CV3 Register Summary (Sheet 1 of 2)