Техническая Спецификация для Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT

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Timer Module (TIM16B8CV3)
MC9S12G Family Reference Manual,
Rev.1.23
760
Freescale Semiconductor
The 16-bit main timer is an up counter.
A full access for the counter register should take place in one clock cycle. A separate read/write for high
byte and low byte will give a different result than accessing them as a word.
Read: Anytime
Write: Has no meaning or effect in the normal mode; only writable in special modes (test_mode = 1).
The period of the first count after a write to the TCNT registers may be a different size because the write
is not synchronized with the prescaler clock.
23.3.2.6
Timer System Control Register 1 (TSCR1)
Read: Anytime
Write: Anytime
Module Base + 0x0005
7
6
5
4
3
2
1
0
R
TCNT7
TCNT6
TCNT5
TCNT4
TCNT3
TCNT2
TCNT1
TCNT0
W
Reset
0
0
0
0
0
0
0
0
Figure 23-11. Timer Count Register Low (TCNTL)
Module Base + 0x0006
7
6
5
4
3
2
1
0
R
TEN
TSWAI
TSFRZ
TFFCA
PRNT
0
0
0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 23-12. Timer System Control Register 1 (TSCR1)
Table 23-6. TSCR1 Field Descriptions
Field
Description
7
TEN
Timer Enable
0 Disables the main timer, including the counter. Can be used for reducing power consumption.
1 Allows the timer to function normally.
If for any reason the timer is not active, there is no
÷64 clock for the pulse accumulator because the ÷64 is
generated by the timer prescaler.
6
TSWAI
Timer Module Stops While in Wait
0 Allows the timer module to continue running during wait.
1 Disables the timer module when the MCU is in the wait mode. Timer interrupts cannot be used to get the MCU
out of wait.
TSWAI also affects pulse accumulator.