Техническая Спецификация для Freescale Semiconductor Tower System Eval Kit for MC9S12GN32 TWR-S12GN32-KIT TWR-S12GN32-KIT

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Timer Module (TIM16B8CV3)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
777
The TIM16B8CV3 could use up to 11 interrupt vectors. The interrupt vector offsets and interrupt numbers
are chip dependent.
23.6.1
Channel [7:0] Interrupt (C[7:0]F)
This active high outputs will be asserted by the module to request a timer channel 7 – 0 interrupt. The TIM
block only generates the interrupt and does not service it. Only bits related to implemented channels are
valid.
23.6.2
Pulse Accumulator Input Interrupt (PAOVI)
This active high output will be asserted by the module to request a timer pulse accumulator input interrupt.
The TIM block only generates the interrupt and does not service it.
23.6.3
Pulse Accumulator Overflow Interrupt (PAOVF)
This active high output will be asserted by the module to request a timer pulse accumulator overflow
interrupt. The TIM block only generates the interrupt and does not service it.
23.6.4
Timer Overflow Interrupt (TOF)
This active high output will be asserted by the module to request a timer overflow interrupt. The TIM block
only generates the interrupt and does not service it.
Table 23-25.
TIM16B8CV3
 Interrupts
Interrupt
Offset
Vector
Priority
Source
Description
C[7:0]F
Timer Channel 7–0
Active high timer channel interrupts 7–0
PAOVI
Pulse Accumulator
Input
Active high pulse accumulator input interrupt
PAOVF
Pulse Accumulator
Overflow
Pulse accumulator overflow interrupt
TOF
Timer Overflow
Timer Overflow interrupt