Техническая Спецификация для Atmel Evaluation Board using the SAM7SE Microcontroller AT91SAM7SE-EK AT91SAM7SE-EK
Модели
AT91SAM7SE-EK
12
6295A–ATARM–27-Mar-07
Application Note
generation of pulses. In the example, the purpose of the TC is to generate an interrupt at a fixed
rate. Actually, such an operation is possible in both the Capture and Waveform mode. Since no
signal is being sampled or generated, there is no reason to choose one mode over the other.
However, setting the TC in Waveform mode and outputting the tick on TIOA or TIOB can be
helpful for debugging purpose.
rate. Actually, such an operation is possible in both the Capture and Waveform mode. Since no
signal is being sampled or generated, there is no reason to choose one mode over the other.
However, setting the TC in Waveform mode and outputting the tick on TIOA or TIOB can be
helpful for debugging purpose.
Setting the CPCTRG bit of the CMR resets the timer and restarts its clock every time the counter
reaches the value programmed in the TC Register C. Generating a specific delay is thus done
by choosing the correct value for RC. It is also possible to choose between several different
input clocks for the channel, which in practice makes it possible to prescale MCK. Since the
timer resolution is 16 bits, using a high prescale factor may be necessary for bigger delays.
reaches the value programmed in the TC Register C. Generating a specific delay is thus done
by choosing the correct value for RC. It is also possible to choose between several different
input clocks for the channel, which in practice makes it possible to prescale MCK. Since the
timer resolution is 16 bits, using a high prescale factor may be necessary for bigger delays.
Consider the following example: the timer must generate a 500 ms delay with a 48 MHz main
clock frequency. RC must be equal to the number of clock cycles generated during the delay
period; here are the results with different prescaling factors:
clock frequency. RC must be equal to the number of clock cycles generated during the delay
period; here are the results with different prescaling factors:
Since the maximum value for RC is 65535, it is clear from these results that using MCK divided
by 1024 or the internal slow clock is necessary for generating long (about 1s) delays. In the
example, a 250 ms delay is used; this means that the slowest possible input clock is selected in
the CMR, and the corresponding value written in RC. The following two operations configure a
250 ms period by selecting the slow clock and dividing its frequency by 4:
by 1024 or the internal slow clock is necessary for generating long (about 1s) delays. In the
example, a 250 ms delay is used; this means that the slowest possible input clock is selected in
the CMR, and the corresponding value written in RC. The following two operations configure a
250 ms period by selecting the slow clock and dividing its frequency by 4:
AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV5_CLOCK
| AT91C_TC_CPCTRG;
AT91C_BASE_TC0->TC_RC = AT91B_SLOW_CLOCK >> 2;
The last initialization step is to configure the interrupt whenever the counter reaches the value
programmed in RC. At the TC level, this is easily done by setting the CPCS bit of the Interrupt
Enable Register. Refer to
programmed in RC. At the TC level, this is easily done by setting the CPCS bit of the Interrupt
Enable Register. Refer to
for more information on configuring inter-
rupts in the AIC.
3.2.4.3
Interrupt Handler
The first action to do in the handler is to acknowledge the pending interrupt from the peripheral.
Otherwise, the latter continues to assert the IRQ line. In the case of a Timer Counter channel,
acknowledging is done by reading the corresponding Status Register (SR).
Otherwise, the latter continues to assert the IRQ line. In the case of a Timer Counter channel,
acknowledging is done by reading the corresponding Status Register (SR).
Special care must be taken to avoid having the compiler optimize away a dummy read to this
register. In C, this is done by declaring a volatile local variable and setting it to the register con-
tent. The volatile keyword tells the compiler to never optimize accesses (read/write) to a
variable.
register. In C, this is done by declaring a volatile local variable and setting it to the register con-
tent. The volatile keyword tells the compiler to never optimize accesses (read/write) to a
variable.
Clock
MCK
2
------------- RC
,
24000000
0.5
×
12000000
=
=
=
Clock
MCK
8
------------- RC
,
6000000
0 5
,
×
3000000
=
=
=
Clock
MCK
128
------------- RC
,
375000
0 5
,
×
187500
=
=
=
Clock
MCK
1024
------------- RC
,
46875
0 5
,
×
23437.5
=
=
=
Clock
32
kHz RC
,
32768
0.5
×
16384
=
=
=