Техническая Спецификация для Atmel ARM-Based Evaluation Kit AT91SAM9N12-EK AT91SAM9N12-EK

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SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]

11063K–ATARM–05-Nov-13

For the Single Block Reads, the NOTBUSY flag is set at the end of the data read block.

For the Multiple Block Reads with pre-defined block count, the NOTBUSY flag is set at the end of the last received data block.

The NOTBUSY flag allows to deal with these different states.

0: The HSMCI is not ready for new data transfer. Cleared at the end of the card response.

1: The HSMCI is ready for new data transfer. Set when the busy state on the data line has ended. This corresponds to a free inter-
nal data receive buffer of the card.

0: No interrupt detected on SDIO Slot A.

1: An SDIO Interrupt on Slot A occurred. Cleared when reading the HSMCI_SR.

0: Normal Bus operation.

1: The data bus has entered IO wait state.

0: No completion signal received since last status read operation.

1: The device has issued a command completion signal on the command line. Cleared by reading in the HSMCI_SR.

0: No error.

1: A mismatch is detected between the command index sent and the response index received. Cleared when writing in the 
HSMCI_CMDR.

0: No error.

1: The direction bit from card to host in the response has not been detected.

0: No error.

1: A CRC7 error has been detected in the response. Cleared when writing in the HSMCI_CMDR.

0: No error.

1: The end bit of the response has not been detected. Cleared when writing in the HSMCI_CMDR.

0: No error.

1: The response time-out set by MAXLAT in the HSMCI_CMDR has been exceeded. Cleared when writing in the HSMCI_CMDR.

0: No error.

1: A CRC16 error has been detected in the last data block. Cleared by reading in the HSMCI_SR.

0: No error.

1: The data time-out set by DTOCYC and DTOMUL in HSMCI_DTOR has been exceeded. Cleared by reading in the HSMCI_SR.