Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK
Модели
AT91SAM9M10-G45-EK
1013
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
43.7.3.10
To Transmit a10-bit Sample Stored in Big Endian Format on AC-link
Halfword to be written in AC97 Controller Channel x Transmit Holding Register (AC97C_CxTHR).
Halfword stored in AC97 Controller Channel x Transmit Holding Register (AC97C_CxTHR) (data to transmit).
Data emitted on related slot: data[19:0] = {0x000, Byte1[1:0], Byte0[7:0]}.
43.7.3.11
To Receive Word transfers
Data received on appropriate slot: data[19:0] = {Byte2[3:0], Byte1[7:0], Byte0[7:0]}.
Word stored in AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) (Received Data)
.
Data is read from AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) when Channel x data
size is greater than 16 bits and when big-endian mode is enabled (data written to memory).
size is greater than 16 bits and when big-endian mode is enabled (data written to memory).
43.7.3.12
To Receive Halfword Transfers
Data received on appropriate slot: data[19:0] = {0x0, Byte1[7:0], Byte0[7:0]}.
Halfword stored in AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) (Received Data).
Data is read from AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) when data size is equal
to 16 bits and when big-endian mode is enabled.
to 16 bits and when big-endian mode is enabled.
43.7.3.13
To Receive 10-bit Samples
Data received on appropriate slot: data[19:0] = {0x000, Byte1[1:0], Byte0[7:0]}.Halfword stored in AC97 Controller
Channel x Receive Holding Register (AC97C_CxRHR) (Received Data)
Channel x Receive Holding Register (AC97C_CxRHR) (Received Data)
Data read from AC97 Controller Channel x Receive Holding Register (AC97C_CxRHR) when data size is equal to
10 bits and when big-endian mode is enabled.
10 bits and when big-endian mode is enabled.
31
24
23
16
15
8
7
0
–
–
Byte0[7:0]
{0x00, Byte1[1:0]}
31
24
23
16
15
10
9
8
7
0
–
–
–
Byte1
[1:0]
Byte0[7:0]
31
24
23
20
19
16
15
8
7
0
–
–
Byte2[3:0]
Byte1[7:0]
Byte0[7:0]
31
24
23
16
15
8
7
0
Byte0[7:0]
Byte1[7:0]
{0x0, Byte2[3:0]}
0x00
31
24
23
16
15
8
7
0
–
–
Byte1[7:0]
Byte0[7:0]
31
24
23
16
15
8
7
0
–
–
Byte0[7:0]
Byte1[7:0]
31
24
23
16
15
10
9
8
7
0
–
–
–
Byte1
[1:0]
Byte0[7:0]
31
24
23
16
15
8
7
3
1
0
–
–
Byte0[7:0]
0x00
Byte1
[1:0]