Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK
Модели
AT91SAM9M10-G45-EK
135
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
19.6
Write Protect Registers
To prevent any single software error that may corrupt MATRIX behavior, the entire MATRIX address space from
address offset 0x000 to 0x1FC can be write-protected by setting the WPEN bit in the MATRIX Write Protect Mode
Register (MATRIX_WPMR).
address offset 0x000 to 0x1FC can be write-protected by setting the WPEN bit in the MATRIX Write Protect Mode
Register (MATRIX_WPMR).
If a write access to anywhere in the MATRIX address space from address offset 0x000 to 0x1FC is detected, then
the WPVS flag in the MATRIX Write Protect Status Register (MATRIX_WPSR) is set and the field WPVSRC indi-
cates in which register the write access has been attempted.
the WPVS flag in the MATRIX Write Protect Status Register (MATRIX_WPSR) is set and the field WPVSRC indi-
cates in which register the write access has been attempted.
The WPVS flag is reset by writing the MATRIX Write Protect Mode Register (MATRIX_WPMR) with the appropri-
ate access key WPKEY.
ate access key WPKEY.
The protected registers are: