Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK

Модели

AT91SAM9M10-G45-EK

242

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

Figure 22-20.

Self Refresh and Automatic Update

Figure 22-21.

Automatic Update During AUTO-REFRESH Command and SDRAM Access

22.5.4.2

Power-down Mode

This mode is activated by setting the low-power command bits [LPCB] to ‘10’.

Power-down mode is used when no access to the SDRAM device is possible. In this mode, power consumption is
greater than in self refresh mode. This state is similar to normal mode (No low-power mode/No self refresh mode),
but the CKE pin is low and the input and output buffers are deactivated as soon the SDRAM device is no longer
accessible. In contrast to self refresh mode, the SDRAM device cannot remain in low-power mode longer than the
refresh period (64 ms). As no auto-refresh operations are performed in this mode, the DDRSDRC carries out the
refresh operation. In order to exit low-power mode, a NOP command is required in the case of Low-power SDR-
SDRAM and SDR-SDRAM devices. In the case of Low-power DDR1-SDRAM devices, the controller generates a
NOP command during a delay of at least TXP. In addition, Low-power DDR1-SDRAM and DDR2-SDRAM must
remain in power-down mode for a minimum period of TCKE periods.

NOP

PRCHG

MRS

ARFSH

NOP

Tmrd

Enter Self Refresh
Mode

SDCLK

A[12:0]

COMMAND

CKE

BA[1:0]

NOP

Update Extended Mode
register

Trp

Pasr-Tcr-Ds

NOP

PRCHALL

MRS