Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK

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AT91SAM9M10-G45-EK
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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
31.7.8.23
Master Node Configuration
The user can choose between two PDC modes by the PDCM bit in the LIN Mode register (US_LINMR):
• PDCM = 1: the LIN configuration is stored in the WRITE buffer and it is written by the PDC in the Transmit 
Holding register US_THR (instead of the LIN Mode register US_LINMR). Because the PDC transfer size is 
limited to a byte, the transfer is split into two accesses. During the first access the bits, NACT, PARDIS, 
CHKDIS, CHKTYP, DLM and FDIS are written. During the second access the 8-bit DLC field is written.
• PDCM = 0: the LIN configuration is not stored in the WRITE buffer and it must be written by the user in the LIN 
Mode register (US_LINMR).
The WRITE buffer also contains the Identifier and the DATA, if the USART sends the response (NACT =
PUBLISH).
The READ buffer contains the DATA if the USART receives the response (NACT = SUBSCRIBE).
Figure  31-52.
Master Node with PDC (PDCM=1)
Figure  31-53.
Master Node with PDC (PDCM=0)
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NACT
PARDIS
CHKDIS
CHKTYP
DLM
FSDIS
DLC
IDENTIFIER
DATA 0
DATA N
WRITE BUFFER
PDC
(DMA)
RXRDY
USART3
LIN CONTROLLER
APB bus
NACT
PARDIS
CHKDIS
CHKTYP
DLM
FSDIS
DLC
IDENTIFIER
DATA 0
DATA N
WRITE BUFFER
PDC
(DMA)
RXRDY
TXRDY
USART3
LIN CONTROLLER
APB bus
READ BUFFER
NODE ACTION = PUBLISH
NODE ACTION = SUBSCRIBE
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RXRDY
TXRDY
APB bus
USART3
LIN CONTROLLER
DATA 0
DATA N
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WRITE BUFFER
PDC
(DMA)
USART3
LIN CONTROLLER
READ BUFFER
NODE ACTION = PUBLISH
NODE ACTION = SUBSCRIBE
PDC
(DMA)
RXRDY
APB bus
IDENTIFIER
DATA 0
DATA N
WRITE BUFFER
IDENTIFIER