Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK

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SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
 
11.3
Device  Initialization
11.3.1
Clock  at  Start  Up
At boot start up, the processor clock (PCK) and the master clock (MCK) are found on the slow clock. The slow
clock can be an external 32 kHz crystal oscillator or the internal RC oscillator. By default the slow clock is the inter-
nal RC oscillator. Its frequency is not precise and is between 20 kHz and 40 kHz. Its start up is much faster than an
external 32 kHz quartz. If a battery supplies the backup power and if the external 32 kHz clock was previously
started up and selected, the slow clock at boot is the external 32 kHz quartz oscillator. Refer to the Slow Clock
Crystal Oscillator description in the Clock Generator section of the datasheet.
11.3.2
Initialization  Sequence
Initialization follows the steps described below:
1.
Stack  setup
 for ARM supervisor mode.
2.
Main  Oscillator  Detection:
 (External crystal or external clock on XIN). The Main Oscillator is disabled at 
startup (MOSCEN = 0). First it is bypassed (OSCBYPASS set at 1). Then the MAINRDY bit is polled. 
Since this bit is raised, the Main Clock Frequency field is analyzed (MAINF). If the value is bigger than 16, 
an external clock connected on XIN is detected. If not, an external quartz connected between XIN and 
XOUT (whose frequency is unknown at this moment) is detected.
3.
Main  Oscillator
 
Enabling
: if an external clock is connected on XIN, the Main Oscillator does not need to 
be started. Otherwise, the OSCBYPASS bit is not set. The Main Oscillator is enabled (MOSCEN = 1) with 
the maximum start-up time and the MOSC bit is polled to wait for stabilization.
4.
Main  Oscillator  Selection
: the Master Clock source is switched from Slow Clock to the Main Oscillator 
without prescaler. The PMC Status Register is polled to wait for MCK Ready. PCK and MCK are now the 
Main Oscillator clock. 
5.
C  variable  initialization:
 non zero-initialized data are initialized in RAM (copy from ROM to RAM). Zero-
initialized data are set to 0 in RAM.
6.
PLLA  initialization: 
PLLA is configured to allow communication on the USB link for the SAM-BA Monitor. 
Its configuration depends on the Main Oscillator source (external clock or crystal) and on its frequency.