Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK

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SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

The Timer Counter (TC) includes three identical 16-bit Timer Counter channels.

Each channel can be independently programmed to perform a wide range of functions including frequency mea-
surement, event counting, interval measurement, pulse generation, delay timing and pulse width modulation. 

Each channel has three external clock inputs, five internal clock inputs and two multi-purpose input/output signals
which can be configured by the user. Each channel drives an internal interrupt signal which can be programmed to
generate processor interrupts.

The Timer Counter block has two global registers which act upon all three TC channels. 

The Block Control Register allows the three channels to be started simultaneously with the same instruction.

The Block Mode Register defines the external clock inputs for each channel, allowing them to be chained.

Note:

1. When Slow Clock is selected for Master Clock (CSS = 0 in PMC Master CLock Register), TIMER_CLOCK5 input is 

Master Clock, i.e., Slow CLock modified by PRES and MDIV fields.

• Three 16-bit Timer Counter Channels

• Wide range of functions including:

– Frequency Measurement

– Event Counting

– Interval Measurement

– Pulse Generation

– Delay Timing

– Pulse Width Modulation

– Up/down Capabilities

• Each channel is user-configurable and contains:

– Three external clock inputs

– Five internal clock inputs

– Two multi-purpose input/output signals

• Two global registers that act on all three TC Channels

Timer Counter Clock Assignment

TIMER_CLOCK1

MCK/2

TIMER_CLOCK2

MCK/8

TIMER_CLOCK3

MCK/32

TIMER_CLOCK4

MCK/128

TIMER_CLOCK5

SLCK