Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK
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Модели
AT91SAM9M10-G45-EK
71
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
12.4.4.2
Wake-up Reset
The Wake-up Reset occurs when the Main Supply is down. When the Main Supply POR output is active, all the
reset signals are asserted except backup_nreset. When the Main Supply powers up, the POR output is resynchro-
nized on Slow Clock. The processor clock is then re-enabled during 3 Slow Clock cycles, depending on the
requirements of the ARM processor.
reset signals are asserted except backup_nreset. When the Main Supply powers up, the POR output is resynchro-
nized on Slow Clock. The processor clock is then re-enabled during 3 Slow Clock cycles, depending on the
requirements of the ARM processor.
At the end of this delay, the processor and other reset signals rise. The field RSTTYP in RSTC_SR is updated to
report a Wake-up Reset.
report a Wake-up Reset.
The “nrst_out” remains asserted for EXTERNAL_RESET_LENGTH cycles. As RSTC_MR is backed-up, the pro-
grammed number of cycles is applicable.
grammed number of cycles is applicable.
When the Main Supply is detected falling, the reset signals are immediately asserted. This transition is synchro-
nous with the output of the Main Supply POR.
nous with the output of the Main Supply POR.
Figure 12-5.
Wake-up State
SLCK
periph_nreset
proc_nreset
Main Supply
POR output
NRST
(nrst_out)
EXTERNAL RESET LENGTH
= 4 cycles (ERSTL = 1)
MCK
Processor Startup
= 3 cycles
backup_nreset
Any
Freq.
Resynch.
2 cycles
RSTTYP
XXX
0x1 = WakeUp Reset
XXX