Техническая Спецификация для Atmel Evaluation Kit AT91SAM9M10-G45-EK AT91SAM9M10-G45-EK

 801

SAM9M10 [DATASHEET]

6355F–ATARM–12-Mar-13

• ERR_FLUSH + ERR_TRANS: The first token IN has been answered and it was the only one received, a second 

bank has been validated but not the third, whereas NB_TRANS was waiting for three transactions. 

• ERR_FL_ISO + ERR_FLUSH + ERR_TRANS: The first token IN has been treated, the data for the second 

Token IN was not available in time, but the second bank has been validated before the end of the microframe. 
The third bank has not been validated, but three transactions have been set in NB_TRANS.

Like data IN, data OUT packets are sent by the host during the data or the status stage of control transfer or during
an interrupt/bulk/isochronous OUT transfer. Data buffers are sent packet by packet under the control of the appli-
cation or under the control of the DMA channel.

Algorithm Description for Each Packet:

• The application enables an interrupt on RX_BK_RDY.

• When an interrupt on RX_BK_RDY is received, the application knows that UDPHS_EPTSTAx register 

BYTE_COUNT bytes have been received.

• The application reads the BYTE_COUNT bytes from the endpoint.

• The application clears RX_BK_RDY.

 If the application does not know the size of the transfer, it may 

 be a good option to use AUTO_VALID.

Because if a zero-length-packet is received, the RX_BK_RDY is automatically cleared by the AUTO_VALID hard-
ware and if the endpoint interrupt is triggered, the software will not find its originating flag when reading the
UDPHS_EPTSTAx register.

Algorithm to Fill Several Packets:

• The application enables the interrupts of BUSY_BANK and AUTO_VALID.

• When a BUSY_BANK interrupt is received, the application knows that all banks available for the endpoint have 

been filled. Thus, the application can read all banks available.

If the application doesn’t know the size of the receive buffer, instead of using the BUSY_BANK interrupt, the appli-
cation must use RX_BK_RDY.

To use the DMA setting, the AUTO_VALID field is mandatory.

See 

DMA Configuration Example:

1.

First program UDPHS_DMAADDRESSx with the address of the buffer that should be transferred.

2.

Enable the interrupt of the DMA in UDPHS_IEN

3.

Program the DMA Channelx Control Register:

– Size of buffer to be sent.

– END_B_EN: Can be used for OUT packet truncation (discarding of unbuffered packet data) at the end 

of DMA buffer.

– END_BUFFIT: Generate an interrupt when BUFF_COUNT in the UDPHS_DMASTATUSx register 

reaches 0.

– END_TR_EN: End of transfer enable, the UDPHS device can put an end to the current DMA transfer, in 

case of a short packet.