Техническая Спецификация для Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD

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SAM4S [DATASHEET]

11100E–ATARM–24-Jul-13

When the ENABLE bit is set to 1, at least one region of the memory map must be enabled for the system to function unless the 
PRIVDEFENA bit is set to 1. If the PRIVDEFENA bit is set to 1 and no regions are enabled, then only privileged software can 
operate.

When the ENABLE bit is set to 0, the system uses the default memory map. This has the same memory attributes as if the MPU 
is not implemented. The default memory map applies to accesses from both privileged and unprivileged software.

When the MPU is enabled, accesses to the System Control Space and vector table are always permitted. Other areas are acces-
sible based on regions and whether PRIVDEFENA is set to 1.

Unless HFNMIENA is set to 1, the MPU is not enabled when the processor is executing the handler for an exception with priority 
–1 or –2. These priorities are only possible when handling a hard fault or NMI exception, or when FAULTMASK is enabled. Set-
ting the HFNMIENA bit to 1 enables the MPU when operating with these two priorities.