Техническая Спецификация для Atmel SAM4S-XPLD Atmel ATSAM4S-XPLD ATSAM4S-XPLD
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Модели
ATSAM4S-XPLD
382
SAM4S [DATASHEET]
11100E–ATARM–24-Jul-13
25.8.1 Bus Matrix Master Configuration Registers
Name:
MATRIX_MCFG0..MATRIX_MCFG3
Address:
0x400E0200
Access:
Read-write
• ULBT: Undefined Length Burst Type
0: Infinite Length Burst
No predicted end of burst is generated and therefore INCR bursts coming from this master cannot be broken.
1: Single Access
The undefined length burst is treated as a succession of single access allowing rearbitration at each beat of the INCR burst.
2: Four Beat Burst
The undefined length burst is split into a 4-beat bursts allowing rearbitration at each 4-beat burst end.
3: Eight Beat Burst
The undefined length burst is split into 8-beat bursts allowing rearbitration at each 8-beat burst end.
4: Sixteen Beat Burst
The undefined length burst is split into 16-beat bursts allowing rearbitration at each 16-beat burst end.
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
–
23
22
21
20
19
18
17
16
–
–
–
–
–
–
–
–
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
–
7
6
5
4
3
2
1
0
–
–
–
–
–
ULBT