Техническая Спецификация для Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO

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Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
21.8.7 Data Output Value Set
This register allows the user to set one or more output I/O pin drive levels high, without doing a read-modify-write 
operation. Changes in this register will also be reflected in the Data Output Value (OUT), Data Output Value Toggle 
(OUTTGL) and Data Output Value Clear (OUTCLR) registers.
Name:
OUTSET
Offset:
0x18+x*0x80 [x=0..1]
Reset:
0x00000000
Property:
Write-Protected
z
Bits 31:0 – OUTSET[31:0]: Port Data Output Value Set
0: The I/O pin output is driven low.
1: The I/O pin output is driven high.
Writing a zero to a bit has no effect.
Writing a one to a bit will set the corresponding bit in the OUT register, which sets the output drive level high for I/O 
pins configured as outputs via the Data Direction register (DIR). For pins configured as inputs via the Data Direc-
tion register (DIR) with pull enabled via the Pull Enable register (PULLEN), these bits will set the input pull direction 
to an internal pull-up.
Bit
31
30
29
28
27
26
25
24
OUTSET[31:24]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
OUTSET[23:16]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
OUTSET[15:8]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
OUTSET[7:0]
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reset
0
0
0
0
0
0
0
0