Техническая Спецификация для Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO

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Atmel | SMART SAM D20 [DATASHEET]

Atmel-42129K–SAM-D20_datasheet–06/2014

In order to use this peripheral, other parts of the system must be configured correctly, as described below.

Using the SERCOM’s I/O lines requires the I/O pins to be configured using port configuration (PORT). Refer to 

When the SERCOM is configured for SPI operation, the pins should be configured according to 

. If the 

receiver is disabled, the data input pin can be used for other purposes. In master mode the slave select line (_SS) is 
controlled by software.

The combined configuration of PORT and the Data In/Data Out and Data Out Pinout bit groups in Control A register will 
define the physical position of the SPI signals in 

The SPI can continue to operate in any sleep mode. The SPI interrupts can be used to wake up the device from sleep 
modes. Refer to 

 for details on the different sleep modes. 

The SERCOM bus clock (CLK_SERCOMx_APB) can be enabled and disabled in the Power Manager, and the default 
state of CLK_SERCOMx_APB can be found in the Peripheral Clock Masking section in the 

A generic clock (GCLK_SERCOMx_CORE) is required to clock the SPI. This clock must be configured and enabled in 
the Generic Clock Controller before using the SPI. Refer to 

 for details. 

This generic clock is asynchronous to the bus clock (CLK_SERCOMx_APB). Due to this asynchronicity, writes to certain 
registers will require synchronization between the clock domains. Refer to 

details.

Not applicable.

The interrupt request line is connected to the Interrupt Controller. Using the SPI, interrupts requires the Interrupt 
Controller to be configured first. Refer to 

 for details. 

Not applicable.

MOSI

Output

Input

MISO

Input

Output

SCK

Output

Input

_SS

User defined output enable

Input