Техническая Спецификация для Atmel ARM-Based Evaluation Kit for SAM4S16C, 32-Bit ARM® Cortex® Microcontroller ATSAM4S-WPIR-RD ATSAM4S-WPIR-RD

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ATSAM4S-WPIR-RD
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SAM4S Series [DATASHEET]
Atmel-11100G-ATARM-SAM4S-Datasheet_27-May-14
390
22.5.5 Cache Controller Maintenance Register 0
Name:
CMCC_MAINT0
Address:
0x4007C020
Access:
 Write-
only
• INVALL: Cache Controller Invalidate All
0: No effect.
1: When set to 1, this field invalidates all cache entries.
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INVALL