Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
123
AT32UC3A
18.8
User interface
18.8.1
Address map
The following addresses are used by the FLASHC. All offsets are relative to the base address
allocated to the flash controller.
(*) The value of the Lock bits is dependent of their programmed state. All other bits in FSR are
0. All bits in FGPFR and FCFR are dependent on the programmed state of the fuses they map
to. Any bits in these registers not mapped to a fuse read 0.
Table 18-4.
Flash controller register mapping
Offset
Register
Name
Access
Reset
state
state
0x0
Flash Control Register
FCR
R/W
0
0x4
Flash Command Register
FCMD
R/W
0
0x8
Flash Status Register
FSR
R/W
0 (*)
0xc
Flash General Purpose Fuse Register Hi
FGPFRHI
R
NA (*)
0x10
Flash General Purpose Fuse Register Lo
FGPFRLO
R
NA (*)
32058K
AVR32-01/12