Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
153
AT32UC3A
21. Peripheral DMA Controller (PDCA)
rev: 1.0.0.0
21.1
Features
•
Generates Transfers to/from Peripherals such as USART, SSC and SPI
•
Two address pointers/counters per channel allowing double buffering
21.2
Overview
The Peripheral DMA controller (PDCA) transfers data between on-chip peripheral modules such
as USART, SPI, SSC and on- and off-chip memories. Using the PDCA avoids CPU intervention
for data transfers, improving the performance of the microcontroller. The PDCA can transfer
data from memory to a peripheral or from a peripheral to memory.
The PDCA consists of a number of DMA channels. Each channel has:
The PDCA consists of a number of DMA channels. Each channel has:
• A 32-bit memory pointer
• A 16-bit transfer counter
• A 32-bit memory pointer reload value
• A 16-bit transfer counter reload value
• A 16-bit transfer counter
• A 32-bit memory pointer reload value
• A 16-bit transfer counter reload value
The PDCA communicates with the peripheral modules over a number of handshake interfaces.
The peripheral signals to the PDCA when it is ready to receive or transmit data. The PDCA
acknowledges the request when the transmission has started.
The number of handshake-interfaces may be higher than the number of DMA channels. If this is
The number of handshake-interfaces may be higher than the number of DMA channels. If this is
the case, the DMA channel must be programmed to use the desired interface.
When a transmit buffer is empty or a receive buffer is full, an interrupt request can be signalled.
When a transmit buffer is empty or a receive buffer is full, an interrupt request can be signalled.
32058K
AVR32-01/12