Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
200
AT32UC3A
23.7.3.2
Master Mode Flow Diagram
Figure 23-6.
Master Mode Flow Diagram S
SPI Enable
CSAAT ?
PS ?
1
0
0
1
1
NPCS = SPI_TDR(PCS)
NPCS = SPI_MR(PCS)
Delay DLYBS
Serializer = SPI_TDR(TD)
TDRE = 1
Data Transfer
SPI_RDR(RD) = Serializer
RDRF = 1
TDRE ?
NPCS = 0xF
Delay DLYBCS
Fixed
peripheral
Variable
peripheral
Delay DLYBCT
0
1
CSAAT ?
0
TDRE ?
1
0
PS ?
0
1
SPI_TDR(PCS)
= NPCS ?
no
yes
SPI_MR(PCS)
= NPCS ?
no
NPCS = 0xF
Delay DLYBCS
NPCS = SPI_TDR(PCS)
NPCS = 0xF
Delay DLYBCS
NPCS = SPI_MR(PCS),
SPI_TDR(PCS)
Fixed
peripheral
Variable
peripheral
- NPCS defines the current Chip Select
- CSAAT, DLYBS, DLYBCT refer to the fields of the
Chip Select Register corresponding to the Current Chip Select
- When NPCS is 0xF, CSAAT is 0.
32058K
AVR32-01/12