Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
398
AT32UC3A
27.6.8
Slow Clock Mode
The SMC is able to automatically apply a set of “slow clock mode” read/write waveforms when
an internal signal driven by the Power Management Controller is asserted because CLK_SMC
has been turned to a very slow clock rate (typically 32kHz clock rate). In this mode, the user-pro-
grammed waveforms are ignored and the slow clock mode waveforms are applied. This mode is
provided so as to avoid reprogramming the User Interface with appropriate waveforms at very
slow clock rate. When activated, the slow mode is active on all chip selects.
27.6.8.1
Slow Clock Mode Waveforms
illustrates the read and write operations in slow clock mode. They are valid on all
chip selects. indicates the value of read and write parameters in slow clock mode.
Figure 27-32.
Read/write Cycles in Slow Clock Mode
CLK_SMC
A[25:2]
NBS0, NBS1,
A0, A1
NCS
NWE
NWE_CYCLES = 3
SLOW CLOCK MODE WRITE
1
1
1
CLK_SMC
A[25:2]
NBS0, NBS1,
A0, A1
NCS
NRD
SLOW CLOCK MODE READ
NRD_CYCLES = 2
1
1
Table 27-4.
Read and Write Timing Parameters in Slow Clock Mode
Read Parameters
Duration (cycles)
Write Parameters
Duration (cycles)
NRD_SETUP
1
NWE_SETUP
1
NRD_PULSE
1
NWE_PULSE
1
NCS_RD_SETUP
0
NCS_WR_SETUP
0
NCS_RD_PULSE
2
NCS_WR_PULSE
3
NRD_CYCLE
2
NWE_CYCLE
3
32058K
AVR32-01/12