Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
406
AT32UC3A
27.7.3
Cycle Register
Register Name:
CYCLE[0..3]
Access Type:
Read/Write
Offset:
0x10 x CS_number + 0x08
Reset Value:
–
• NRD_CYCLE: Total Read Cycle Length
The total read cycle length is the total duration in clock cycles of the read cycle. It is equal to the sum of the setup, pulse
and hold steps of the NRD and NCS signals. It is defined as:
Read cycle length = (NRD_CYCLE[8:7]*256 + NRD_CYCLE[6:0]) clock cycles
Read cycle length = (NRD_CYCLE[8:7]*256 + NRD_CYCLE[6:0]) clock cycles
• NWE_CYCLE: Total Write Cycle Length
The total write cycle length is the total duration in clock cycles of the write cycle. It is equal to the sum of the setup, pulse
and hold steps of the NWE and NCS signals. It is defined as:
Write cycle length = (NWE_CYCLE[8:7]*256 + NWE_CYCLE[6:0]) clock cycles
Write cycle length = (NWE_CYCLE[8:7]*256 + NWE_CYCLE[6:0]) clock cycles
31
30
29
28
27
26
25
24
–
–
–
–
–
–
–
NRD_CYCLE
23
22
21
20
19
18
17
16
NRD_CYCLE
15
14
13
12
11
10
9
8
–
–
–
–
–
–
–
NWE_CYCLE
7
6
5
4
3
2
1
0
NWE_CYCLE
32058K
AVR32-01/12