Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105

Модели
ATEVK1105
Скачать
Страница из 826
411
AT32UC3A
28.3
Block Diagram
Figure 28-1.
SDRAM Controller Block Diagram
28.4
I/O Lines Description
Memory
Controller
Peripheral Bus
SDRAMC
Interrupt
SDCK
SDCS
SDRAMC_A[12:0]
SDRAMC
PIO
Controller
BA[1:0]
SDCKE
RAS
CAS
SDWE
NBS[3:0]
User Interface
PMC
MCK
D[31:0]
SDRAMC
Chip Select
Table 28-1.
I/O Line Description 
Name
Description
Type
Active Level
SDCK
SDRAM Clock
Output
SDCKE
SDRAM Clock Enable
Output
High
SDCS
SDRAM Controller Chip Select
Output
Low
BA[1:0]
Bank Select Signals
Output
RAS
Row Signal
Output
Low
CAS
Column Signal
Output
Low
SDWE
SDRAM Write Enable
Output
Low
NBS[3:0]
Data Mask Enable Signals
Output
Low
SDRAMC_A[12:0]
Address Bus
Output
D[31:0]
Data Bus
I/O
32058K
AVR32-01/12