Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
438
AT32UC3A
29.3
Block Diagram
Figure 29-1.
MACB Block Diagram
29.4
Product Dependencies
29.4.1
I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
The programmer must first program the PIO controllers to assign the MACB pins to their periph-
eral functions.
29.4.2
Power Management
The MACB clock is generated by the Power Manager. Before using the MACB, the programmer
must ensure that the MACB clock is enabled in the Power Manager.
In the MACB description, Master Clock (MCK) is the clock of the peripheral bus to which the
In the MACB description, Master Clock (MCK) is the clock of the peripheral bus to which the
MACB is connected.
The synchronization module in the MACB requires that the bus clock (hclk) runs on at least the
The synchronization module in the MACB requires that the bus clock (hclk) runs on at least the
speed of the macb_tx/rx_clk, which is 25MHz in 100Mbps, and 2.5MHZ in 10Mbps in MII mode
and 50MHz in 100Mbps, and 5MHZ in 10Mbps in RMII mode.
To prevent bus errors the MACB operation must be terminated before entering sleep mode.
To prevent bus errors the MACB operation must be terminated before entering sleep mode.
Peripheral Bus
Slave
Register Interface
DMA Interface
Address Checker
Statistics Registers
Control Registers
Ethernet Receive
Ethernet Transmit
MDIO
MII/RMII
RX FIFO
TX FIFO
High Speed Bus
Master
32058K
AVR32-01/12