Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
44
AT32UC3A
12.4.3
SPIs
Each SPI can be connected to an internally divided clock:
12.5
Nexus OCD AUX port connections
If the OCD trace system is enabled, the trace system will take control over a number of pins, irre-
spectively of the PIO configuration. Two different OCD trace pin mappings are possible,
depending on the configuration of the OCD AXS register. For details, see the AVR32 UC Tech-
nical Reference Manual
.
12.6
PDC handshake signals
The PDC and the peripheral modules communicate through a set of handshake signals. The fol-
lowing table defines the valid settings for the Peripheral Identifier (PID) in the PDC Peripheral
Select Register (PSR).
Table 12-6.
SPI clock connections
SPI
Source
Name
Connection
0
Internal
CLK_DIV
PBA clock or
PBA clock / 32
1
Table 12-7.
Nexus OCD AUX port connections
Pin
AXS=0
AXS=1
EVTI_N
PB19
PA08
MDO[5]
PB16
PA27
MDO[4]
PB14
PA26
MDO[3]
PB13
PA25
MDO[2]
PB12
PA24
MDO[1]
PB11
PA23
MDO[0]
PB10
PA22
EVTO_N
PB20
PB20
MCKO
PB21
PA21
MSEO[1]
PB04
PA07
MSEO[0]
PB17
PA28
Table 12-8.
PDC Handshake Signals
PID Value
Peripheral module & direction
0
ADC
1
SSC - RX
2
USART0 - RX
3
USART1 - RX
32058K
AVR32-01/12