Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
60
AT32UC3A
13.5.7
Sleep modes
In normal operation, all clock domains are active, allowing software execution and peripheral
operation. When the CPU is idle, it is possible to switch off the CPU clock and optionally other
clock domains to save power. This is activated by the sleep instruction, which takes the sleep
mode index number as argument.
13.5.7.1
Entering and exiting sleep modes
The sleep instruction will halt the CPU and all modules belonging to the stopped clock domains.
The modules will be halted regardless of the bit settings of the mask registers.
Oscillators and PLLs can also be switched off to save power. Some of these modules have a rel-
Oscillators and PLLs can also be switched off to save power. Some of these modules have a rel-
atively long start-up time, and are only switched off when very low power consumption is
required.
The CPU and affected modules are restarted when the sleep mode is exited. This occurs when
The CPU and affected modules are restarted when the sleep mode is exited. This occurs when
an interrupt triggers. Note that even if an interrupt is enabled in sleep mode, it may not trigger if
the source module is not clocked.
13.5.7.2
Supported sleep modes
The following sleep modes are supported. These are detailed in
•Idle: The CPU is stopped, the rest of the chip is operating. Wake-up sources are any interrupt.
•Frozen: The CPU and HSB modules are stopped, peripherals are operating. Wake-up sources
•Frozen: The CPU and HSB modules are stopped, peripherals are operating. Wake-up sources
are any interrupt from PB modules.
•Standby: All synchronous clocks are stopped, but oscillators and PLLs are running, allowing
•Standby: All synchronous clocks are stopped, but oscillators and PLLs are running, allowing
quick wake-up to normal mode. Wake-up sources are RTC or external interrupt (EIC).
•Stop: As Standby, but Oscillator 0 and 1, and the PLLs are stopped. 32 KHz (if enabled) and
•Stop: As Standby, but Oscillator 0 and 1, and the PLLs are stopped. 32 KHz (if enabled) and
RC oscillators and RTC/WDT still operate. Wake-up sources are RTC, external interrupt (EIC),
or external reset pin.
•DeepStop: All synchronous clocks, Oscillator 0 and 1 and PLL 0 and 1 are stopped. 32 KHz
•DeepStop: All synchronous clocks, Oscillator 0 and 1 and PLL 0 and 1 are stopped. 32 KHz
oscillator can run if enabled. RC oscillator still operates. Bandgap voltage reference and BOD is
turned off. Wake-up sources are RTC, external interrupt (EIC) or external reset pin.
•Static: All oscillators, including 32 KHz and RC oscillator are stopped. Bandgap voltage refer-
•Static: All oscillators, including 32 KHz and RC oscillator are stopped. Bandgap voltage refer-
ence BOD detector is turned off. Wake-up sources are external interrupt (EIC) in asynchronous
mode only or external reset pin.
Table 13-1.
Sleep modes
Index
Sleep Mode
CPU
HSB
PBA,B
GCLK
Osc0,1
PLL0,1
Osc32
RCOsc
BOD &
Bandgap
Bandgap
Voltage
Regulator
0
Idle
Stop
Run
Run
Run
Run
Run
On
Full power
1
Frozen
Stop
Stop
Run
Run
Run
Run
On
Full power
2
Standby
Stop
Stop
Stop
Run
Run
Run
On
Full power
3
Stop
Stop
Stop
Stop
Stop
Run
Run
On
Low power
4
DeepStop
Stop
Stop
Stop
Stop
Run
Run
Off
Low power
5
Static
Stop
Stop
Stop
Stop
Stop
Stop
Off
Low power
32058K
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