Техническая Спецификация для Atmel Evaluation Kit for AT32uC3A0512, 32-Bit AVR Microcontroller Atmel ATEVK1105 ATEVK1105
Модели
ATEVK1105
683
AT32UC3A
32.6.3.4
Interrupts
Depending on the interrupt mask in the IMR register, an interrupt is generated at the end of the
corresponding channel period. The interrupt remains active until a read operation in the ISR reg-
ister occurs.
A channel interrupt is enabled by setting the corresponding bit in the IER register. A channel
A channel interrupt is enabled by setting the corresponding bit in the IER register. A channel
interrupt is disabled by setting the corresponding bit in the IDR register.
32058K
AVR32-01/12