Техническая Спецификация для Linear Technology LTC2378-20, 20-Bit, 1Msps, SAR ADC with 104dB SNR. Req DC590 or DC890 DC1925A-A DC1925A-A
Модели
DC1925A-A
LTC2378-20
9
237820f
TiMing DiagraM
POWER-DOWN AND ACQUIRE
CONVERT
D15 D14
D17 D16
D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
SDO
SCK
CNV
CHAIN, RDL/SDI = 0
BUSY
237820 TD01
D17
D19 D18
Conversion Timing Using the Serial Interface
applicaTions inForMaTion
OVERVIEW
The LTC2378-20 is a low noise, low power, high speed
The LTC2378-20 is a low noise, low power, high speed
20-bit successive approximation register (SAR) ADC.
Operating from a single 2.5V supply, the LTC2378-20
supports a large and flexible ±V
REF
fully differential input
range with V
REF
ranging from 2.5V to 5.1V, making it ideal
for high performance applications which require a wide
dynamic range. The LTC2378-20 achieves ±2ppm INL
maximum, no missing codes at 20 bits and 104dB SNR.
Fast 1Msps throughput with no cycle latency makes the
Fast 1Msps throughput with no cycle latency makes the
LTC2378-20 ideally suited for a wide variety of high speed
applications. An internal oscillator sets the conversion time,
easing external timing considerations. The LTC2378-20
dissipates only 21mW at 1Msps, while an auto power-down
feature is provided to further reduce power dissipation
during inactive periods.
The LTC2378-20 features a unique digital gain compres-
The LTC2378-20 features a unique digital gain compres-
sion (DGC) function, which eliminates the driver amplifier’s
negative supply while preserving the full resolution of the
ADC. When enabled, the ADC performs a digital scaling
function that maps zero-scale code from 0V to 0.1 • V
REF
and full-scale code from V
REF
to 0.9 • V
REF
. For a typical
reference voltage of 5V, the full-scale input range is now
0.5V to 4.5V, which provides adequate headroom for
powering the driving amplifier from a single 5.5V supply.
CONVERTER OPERATION
The LTC2378-20 operates in two phases. During the ac-
The LTC2378-20 operates in two phases. During the ac-
quisition phase, the charge redistribution capacitor D/A
converter (CDAC) is connected to the IN
+
and IN
–
pins
to sample the differential analog input voltage. A rising
edge on the CNV pin initiates a conversion. During the
conversion phase, the 20-bit CDAC is sequenced through a
successive approximation algorithm, effectively comparing
the sampled input with binary-weighted fractions of the
reference voltage (e.g. V
REF
/2, V
REF
/4 … V
REF
/1048576)
using the differential comparator. At the end of conversion,
the CDAC output approximates the sampled analog input.
The ADC control logic then prepares the 20-bit digital
output code for serial transfer.
TRANSFER FUNCTION
The LTC2378-20 digitizes the full-scale voltage of 2
The LTC2378-20 digitizes the full-scale voltage of 2
× REF
into 2
20
levels, resulting in an LSB size of 9.5µV with
REF = 5V. Note that 1 LSB at 20 bits is approximately
1ppm. The ideal transfer function is shown in Figure 2.
The output data is in 2’s complement format.
ANALOG INPUT
The analog inputs of the LTC2378-20 are fully differential
The analog inputs of the LTC2378-20 are fully differential
in order to maximize the signal swing that can be digitized.
The analog inputs can be modeled by the equivalent circuit