Техническая Спецификация для Linear Technology LTC2377-16 with LTC6655-5/LT6350: 16-Bit, 500ksps, SAR ADC with 97dB SNR. Req DC718 or DC590 DC1783A-C DC1783A-C

Модели

DC1783A-C

LTC2377-16

237716f

OVERVIEW
The LTC2377-16 is a low noise, low power, high speed

16-Bit successive approximation register (SAR) ADC.

Operating from a single 2.5V supply, the LTC2377-16

supports a large and flexible ±V

REF

fully differential input

range with V

REF

ranging from 2.5V to 5.1V, making it ideal

for high performance applications which require a wide

dynamic range. The LTC2377-16 achieves ±0.5LSB INL

max, no missing codes at 16 bits and 97dB SNR.
Fast 500ksps throughput with no cycle latency makes

the LTC2377-16 ideally suited for a wide variety of high

speed applications. An internal oscillator sets the con-

version time, easing external timing considerations. The

LTC2377-16 dissipates only 6.8mW at 500ksps, while an

auto power-down feature is provided to further reduce

power dissipation during inactive periods.
The LTC2377-16 features a unique digital gain compres-

sion (DGC) function, which eliminates the driver amplifier’s

negative supply while preserving the full resolution of the

ADC. When enabled, the ADC performs a digital scaling

function that maps zero-scale code from 0V to 0.1 • V

REF

and full-scale code from V

REF

to 0.9 • V

REF

. For a typical

reference voltage of 5V, the full-scale input range is now

0.5V to 4.5V, which provides adequate headroom for

powering the driving amplifier from a single 5.5V supply.

CONVERTER OPERATION
The LTC2377-16 operates in two phases. During the ac-

quisition phase, the charge redistribution capacitor D/A

converter (CDAC) is connected to the IN

and IN

–

pins

to sample the differential analog input voltage. A rising

edge on the CNV pin initiates a conversion. During the

conversion phase, the 16-bit CDAC is sequenced through a

successive approximation algorithm, effectively comparing

the sampled input with binary-weighted fractions of the

reference voltage (e.g. V

REF

/2, V

REF

/4 … V

REF

/65536) using

the differential comparator. At the end of conversion, the

CDAC output approximates the sampled analog input. The

ADC control logic then prepares the 16-bit digital output

code for serial transfer.

applicaTions inForMaTion

Figure 2. LTC2377-16 Transfer Function

INPUT VOLTAGE (V)

OUTPUT CODE (TWO’S COMPLEMENT)

–1

LSB

237716 F02

011...111
011...110

000...001
000...000

100...000

100...001

111...110

LSB

BIPOLAR

ZERO

111...111

FSR/2 – 1LSB

–FSR/2

FSR = +FS – –FS

1LSB = FSR/65536

TRANSFER FUNCTION
The LTC2377-16 digitizes the full-scale voltage of 2

× REF

into 2

levels, resulting in an LSB size of 152µV with

REF = 5V. The ideal transfer function is shown in Figure 2.

The output data is in 2’s complement format.

40Ω

45pF

40Ω

REF

45pF

–

BIAS

VOLTAGE

237716 F03

Figure 3. The Equivalent Circuit for the

Differential Analog Input of the LTC2377-16

ANALOG INPUT
The analog inputs of the LTC2377-16 are fully differential

in order to maximize the signal swing that can be digitized.

The analog inputs can be modeled by the equivalent circuit

shown in Figure 3. The diodes at the input provide ESD

protection. In the acquisition phase, each input sees ap-

proximately 45pF (C

) from the sampling CDAC in series

with 40Ω (R

) from the on-resistance of the sampling

switch. Any unwanted signal that is common to both

inputs will be reduced by the common mode rejection of

the ADC. The inputs draw a current spike while charging

the C

capacitors during acquisition. During conversion,

the analog inputs draw only a small leakage current.