Техническая Спецификация для Atmel ATmega328P Xplained Mini MEGA328P-XMINI MEGA328P-XMINI

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ATmega48A/PA/88A/PA/168A/PA/328/P [DATASHEET]
Atmel-8271H-AVR- ATmega-Datasheet_08/2014
Pull-up resistors on the dW/(RESET) line must not be smaller than 10k
. The pull-up resistor is not 
required for debugWIRE functionality.
Connecting the RESET pin directly to V
CC
 will not work.
Capacitors connected to the RESET pin must be disconnected when using debugWire.
All external reset sources must be disconnected.
25.4
Software Break Points
debugWIRE supports Program memory Break Points by the AVR Break instruction. Setting a Break Point in 
AVR Studio
®
 will insert a BREAK instruction in the Program memory. The instruction replaced by the BREAK 
instruction will be stored. When program execution is continued, the stored instruction will be executed before 
continuing from the Program memory. A break can be inserted manually by putting the BREAK instruction in the 
program.
The Flash must be re-programmed each time a Break Point is changed. This is automatically handled by AVR 
Studio through the debugWIRE interface. The use of Break Points will therefore reduce the Flash Data 
retention. Devices used for debugging purposes should not be shipped to end customers.
25.5
Limitations of debugWIRE
The debugWIRE communication pin (dW) is physically located on the same pin as External Reset (RESET). An 
External Reset source is therefore not supported when the debugWIRE is enabled.
A programmed DWEN Fuse enables some parts of the clock system to be running in all sleep modes. This will 
increase the power consumption while in sleep. Thus, the DWEN Fuse should be disabled when debugWire is 
not used.
25.6
Register Description
The following section describes the registers used with the debugWire.
25.6.1 DWDR – debugWire Data Register
The DWDR Register provides a communication channel from the running program in the MCU to the debugger. 
This register is only accessible by the debugWIRE and can therefore not be used as a general purpose register 
in the normal operations.
Bit
7
6
5
4
3
2
1
0
DWDR[7:0]
DWDR
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0