System Bus AC Specifications (AGTL+ Signal Group) at the Processor
Core Pins (for S.E.P. Package)........................................................................... 39

Processor System Bus AC Specifications (AGTL+ Signal Group) at the
Processor Core Pins (for PPGA Package).......................................................... 40

System Bus AC Specifications (AGTL+ Signal Group) at the Processor
Core Pins (for FC-PGA/FC-PGA2 Packages) ..................................................... 40

System Bus AC Specifications (CMOS Signal Group) at the Processor
Edge Fingers (for S.E.P. Package) .....................................................................41

System Bus AC Specifications (CMOS Signal Group) at the Processor
Core Pins (for Both S.E.P., PGA, and FC-PGA/FC-PGA2 Packages)................ 41

System Bus AC Specifications (CMOS Signal Group) ....................................... 42

System Bus AC Specifications (Reset Conditions)
(for Both S.E.P. and PPGA Packages) ...............................................................42

System Bus AC Specifications (Reset Conditions) (for the
FC-PGA/FC-PGA2 Packages) ............................................................................42

System Bus AC Specifications (APIC Clock and APIC I/O) at the
Processor Edge Fingers (for S.E.P. Package) .................................................... 43

System Bus AC Specifications (APIC Clock and APIC I/O) at the
Processor Core Pins (For S.E.P. and PGA Packages) ....................................... 44

System Bus AC Specifications (APIC Clock and APIC I/O) ................................ 45

System Bus AC Specifications (TAP Connection) at the Processor
Edge Fingers (For S.E.P. Package) .................................................................... 45

System Bus AC Specifications (TAP Connection) at the Processor
Core Pins (for Both S.E.P. and PPGA Packages)............................................... 46

System Bus AC Specifications (TAP Connection) .............................................. 47

BCLK Signal Quality Specifications for Simulation at the Processor Core
(for Both S.E.P. and PPGA Packages) ...............................................................52

BCLK/PICCLK Signal Quality Specifications for Simulation at the
Processor Pins (for the FC-PGA/FC-PGA2 Packages)....................................... 53