Справочник Пользователя для Intel 4 1.30 GHz 80528PC0130K
Модели
80528PC0130K
Intel
®
Pentium
®
4 Processor in the 423-pin Package
78
7.2.6
Deep Sleep State—State 6
Deep Sleep state is the lowest power state the processor can enter while maintaining context. Deep
Sleep state is entered by stopping the BCLK[1:0] inputs (after the Sleep state was entered from the
assertion of the SLP# pin). The processor is in Deep Sleep state immediately after BLCK[1:0] is
stopped. To provide maximum power conservation hold the BLCK0 input at V
Sleep state is entered by stopping the BCLK[1:0] inputs (after the Sleep state was entered from the
assertion of the SLP# pin). The processor is in Deep Sleep state immediately after BLCK[1:0] is
stopped. To provide maximum power conservation hold the BLCK0 input at V
OL
and the BCLK1
input at V
OH
during the Deep Sleep state. Stopping the BCLK input lowers the overall current
consumption to leakage levels.
To re-enter the Sleep state, the BLCK input must be restarted. A period of 1 ms (to allow for PLL
stabilization) must occur before the processor can be considered to be in the Sleep State. Once in
the Sleep state, the SLP# pin can be deasserted to re-enter the Stop-Grant state.
stabilization) must occur before the processor can be considered to be in the Sleep State. Once in
the Sleep state, the SLP# pin can be deasserted to re-enter the Stop-Grant state.
While in Deep Sleep state, the processor is incapable of responding to snoop transactions or
latching interrupt signals. No transitions or assertions of signals are allowed on the system bus
while the processor is in Deep Sleep state. Any transition on an input signal before the processor
has returned to Stop-Grant state will result in unpredictable behavior. The processor has to stay in
Deep Sleep mode for a minimum of 25 ms.
latching interrupt signals. No transitions or assertions of signals are allowed on the system bus
while the processor is in Deep Sleep state. Any transition on an input signal before the processor
has returned to Stop-Grant state will result in unpredictable behavior. The processor has to stay in
Deep Sleep mode for a minimum of 25 ms.
When the processor is in Deep Sleep state, it will not respond to interrupts or snoop transactions.
7.3
Thermal Monitor
Thermal Monitor is a new feature found in the Pentium 4 processor which allows system designers
to design lower cost thermal solutions, without compromising system integrity or reliability. By
using a factory-tuned, precision on-die thermal sensor, and a fast acting thermal control circuit
(TCC), the processor, without the aid of any additional software or hardware, can keep the
processors' die temperature within factory specifications under typical real world operating
conditions. Thermal Monitor thus allows the processor and system thermal solutions to be designed
much closer to the power envelopes of real applications, instead of being designed to the much
higher maximum theoretical processor power envelopes.
to design lower cost thermal solutions, without compromising system integrity or reliability. By
using a factory-tuned, precision on-die thermal sensor, and a fast acting thermal control circuit
(TCC), the processor, without the aid of any additional software or hardware, can keep the
processors' die temperature within factory specifications under typical real world operating
conditions. Thermal Monitor thus allows the processor and system thermal solutions to be designed
much closer to the power envelopes of real applications, instead of being designed to the much
higher maximum theoretical processor power envelopes.
Thermal Monitor controls the processor temperature by modulating the internal processor core
clocks. The processor clocks are modulated when the TCC is activated. Thermal Monitor uses two
modes to activate the TCC. Automatic mode and On-Demand mode. Automatic mode is required
for the processor to operate within specifications and must first be enabled via BIOS. Once
automatic mode is enabled, the TCC will activate only when the internal die temperature is very
near the temperature limits of the processor. When TCC is enabled, and a high temperature
situation exists (i.e. TCC is active), the clocks will be modulated by alternately turning the clocks
off and on at a a 50% duty cycle. Clocks will not be off more than 3
clocks. The processor clocks are modulated when the TCC is activated. Thermal Monitor uses two
modes to activate the TCC. Automatic mode and On-Demand mode. Automatic mode is required
for the processor to operate within specifications and must first be enabled via BIOS. Once
automatic mode is enabled, the TCC will activate only when the internal die temperature is very
near the temperature limits of the processor. When TCC is enabled, and a high temperature
situation exists (i.e. TCC is active), the clocks will be modulated by alternately turning the clocks
off and on at a a 50% duty cycle. Clocks will not be off more than 3
µ
s when TCC is active. Cycle
times are processor speed dependent and will decrease as processor core frequencies increase. A
small amount of hysteresis has been included to prevent rapid active/inactive transitions of the
TCC when the processor temperature is near the trip point. Once the temperature has returned to a
non-critical level, and the hysteresis timer has expired, modulation ceases and TCC goes inactive.
Processor performance will be decreased by ~50% when the TCC is active (assuming a 50% duty
cycle), however, with a properly designed and characterised thermal solution the TCC most likely
will only be activated briefly when the system is near maximum temperature and during the most
power intensive applications.
small amount of hysteresis has been included to prevent rapid active/inactive transitions of the
TCC when the processor temperature is near the trip point. Once the temperature has returned to a
non-critical level, and the hysteresis timer has expired, modulation ceases and TCC goes inactive.
Processor performance will be decreased by ~50% when the TCC is active (assuming a 50% duty
cycle), however, with a properly designed and characterised thermal solution the TCC most likely
will only be activated briefly when the system is near maximum temperature and during the most
power intensive applications.
For automatic mode, the 50% duty cycle is factory configured and cannot be modified. Also,
automatic mode does not require any additional hardware, software drivers or interrupt handling
routines.
automatic mode does not require any additional hardware, software drivers or interrupt handling
routines.