Техническая Спецификация для Intel i5-4200H CL8064701470601

•

Side band sync pin (FDI_CSYNC).

•

Side band interrupt pin (DISP_INT). This carries combined interrupt for HPDs of all

the ports, AUX and I

2

C completion events, and so on.

•

Intel FDI is not encrypted as it drives only VGA and content protection is not

supported on VGA.

PECI is an Intel proprietary interface that provides a communication channel between

Intel processors and external components, like Super I/O (SIO) and Embedded

Controllers (EC), to provide processor temperature, Turbo, Configurable TDP, and

memory throttling control mechanisms and many other services. PECI is used for

platform thermal management and real time control and configuration of processor

features and performance.

The PECI architecture is based on a wired-OR bus that the clients (as processor PECI)

can pull up high (with strong drive).

The idle state on the bus is near zero.

The following figure demonstrates PECI design and connectivity. While the host/

originator can be a third party PECI host, one of the PECI clients is a processor PECI

device.

Mobile 4th Generation Intel

®

 Core

™

 Processor Family, Mobile Intel

®

 Pentium

®

 Processor Family, and Mobile Intel

®

 Celeron

®

Processor Family

Datasheet – Volume 1 of 2

July 2014

38

Order No.: 328901-007