Техническая Спецификация для Intel C2530 FH8065401488915
Модели
FH8065401488915
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 3 of 3
Order Number: 330061-002US
593
Volume 3—Signal Names and Descriptions—C2000 Product Family
GbE, SMBus, and NC-SI Signals
31.10
GbE, SMBus, and NC-SI Signals
Table 31-12. GbE, SMBus, and NC-SI Signals (Sheet 1 of 5)
Signal Name
I/O
Type
I/O Buffer
Type
Ball
Count
Internal
Resistor
PU/PD
External
Resistor
PU/PD
Power
Rail
Description
GBE_TXP[3:0]
O
LV DIFF
4
V1P0A
SerDes/SGMII Serial Data
output Port: Differential
SGMII/SerDes Transmit
interface.
GBE_TXN[3:0]
O
LV DIFF
4
V1P0A
SerDes/SGMII Serial Data
output Port: Differential
SGMII/SerDes Transmit
interface.
GBE_RXP[3:0]
I
LV DIFF
4
V1P0A
SerDes/SGMII Serial Data
input Port: Differential SGMII/
SerDes Receive interface.
GBE_RXN[3:0]
I
LV DIFF
4
V1P0A
SerDes/SGMII Serial Data
input Port: Differential SGMII/
SerDes Receive interface.
GBE_REFCLKP
GBE_REFCLKN
GBE_REFCLKN
I
LV DIFF
1
V1P0A
GbE 100 MHz differential clock
with 100 ppm maximum jitter.
External SerDes/SGMII
differential 100 MHz reference
clock from an external
generator. This clock must be
powered from the Suspend
(SUS) power well. When the
device is enabled for 2.5-GbE
operation, the standard 100-
MHz reference clock must be
replaced with a 125-MHz
reference clock.
GBE_OBSP
GBE_OBSN
GBE_OBSN
O
Analog
2
V1P0A
GBE RCOMP: Connect the
GBE_OBSP pin to the
GBE_OBSN pin using a 402-Ω
±1% resistor.
GBE_SMBD/
NCSI_TX_EN
I/O,
OD
CMOS_V3P3_
OD
1
20K, PU
EXT PU
V3P3A
GbE SMBus Clock. One clock
pulse is generated for each
data bit transferred. An
external pull-up resistor
required. Resistor value is
calculated based on the bus
load. (Refer to the Platform
Design Guide).
If the GBE_SMBD interface is
not used, the signals can be
used as NCSI_TX_EN Transmit
Enable (input).
Note:
If not used, have an
external pull-down
resistor.