Техническая Спецификация для Intel C2530 FH8065401488915
Модели
FH8065401488915
Volume 2—System Agent and Root Complex—C2000 Product Family
Signal Descriptions
Intel
®
Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
64
Order Number: 330061-002US
4.2
Signal Descriptions
While not shown precisely in the block diagram, five external signal pins are associated
with this portion of the SoC. See
Chapter 31, “Signal Names and Descriptions”
for
additional details.
The signal description table has the following headings:
• Signal Name: The signal/pin name
• Direction: The buffer direction is either input, output, or I/O (bi-directional)
• Type: The buffer type
• Description: A brief explanation of the signal function
• Direction: The buffer direction is either input, output, or I/O (bi-directional)
• Type: The buffer type
• Description: A brief explanation of the signal function
4.3
Features
• SoC System Agent (SSA) using the Pondicherry Intra-Die-Interconnect (IDI)
— IDI is the standard interface between the caching agents of the core units and
the SSA in the Pondicherry architecture.
• 36-bit physical memory-space addressing (64 GB)
• Patrol scrub engine that performs a memory scrub to fix correctable memory errors
• Patrol scrub engine that performs a memory scrub to fix correctable memory errors
in the background
• Robust RAS
• Internal Root Complex Event Collector (RCEC) for PCI Express* and local error
• Internal Root Complex Event Collector (RCEC) for PCI Express* and local error
escalation
• PCI Express Advanced Error Reporting (AER) support
• MSI signaling
• INTx signaling
• Internal command and data path parity coverage (single bit each)
• Internal RAM parity coverage
• MSI signaling
• INTx signaling
• Internal command and data path parity coverage (single bit each)
• Internal RAM parity coverage
Table 4-2.
Signals
Signal Name
Direction/
Type
Description
O
Error (active low)
Detected errors are indicated to the external circuitry.
Detected errors are indicated to the external circuitry.
• ERROR0_B indicates correctable errors.
• ERROR1_B indicates non-fatal errors.
• ERROR2_B indicates fatal errors.
• ERROR1_B indicates non-fatal errors.
• ERROR2_B indicates fatal errors.
The platform board must ignore these SoC output signals while
PMU_PLTRST_B (active-low SoC output) is asserted.
These signals are muxed and are used by other functions.
These signals are muxed and are used by other functions.
O
Machine Check Error (active low)
Detected machine check errors (machine check exceptions) are
Detected machine check errors (machine check exceptions) are
indicated to the external circuitry.
The platform board must ignore this SoC output signal while
The platform board must ignore this SoC output signal while
PMU_PLTRST_B (active-low SoC output) is asserted.
These signals are muxed and are used by other functions.
These signals are muxed and are used by other functions.
O
Internal Error (active low)
Detected unrecoverable internal errors are indicated to the external
Detected unrecoverable internal errors are indicated to the external
circuitry.
The platform board must ignore this SoC output signal while
The platform board must ignore this SoC output signal while
PMU_PLTRST_B (active-low SoC output) is asserted.
These signals are muxed and are used by other functions.
These signals are muxed and are used by other functions.