Техническая Спецификация для Intel C2550 FH8065401488912
Модели
FH8065401488912
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 3 of 3
Order Number: 330061-002US
599
Volume 3—Signal Names and Descriptions—C2000 Product Family
LPC Interface Signals
31.11
LPC Interface Signals
Table 31-14. LPC Signals (Sheet 1 of 2)
Signal Name
I/O
Type
I/O Buffer
Type
Ball
Count
Internal
Resistor
PU/PD
External
Resistor
PU/PD
Power
Rail
Description
LPC_AD0/GPIOS_21
I/O
CMOS_V3P3
1
20K, PU
V3P3S
LPC Address/Data:
Multiplexed Command,
Address, Data. If the
LPC_AD0 interface is not
used, the signals can be used
as GPIO Port 21.
LPC_AD1/GPIOS_22
I/O
CMOS_V3P3
1
20K, PU
V3P3S
LPC Address/Data:
Multiplexed Command,
Address, Data. If the
LPC_AD1 interface is not
used, the signals can be used
as GPIO Port 22.
LPC_AD2/GPIOS_23
I/O
CMOS_V3P3
1
20K, PU
V3P3S
LPC Address/Data:
Multiplexed Command,
Address, Data. If the
LPC_AD2 interface is not
used, the signals can be used
as GPIO Port 23.
LPC_AD3/GPIOS_24
I/O
CMOS_V3P3
1
20K, PU
V3P3S
LPC Address/Data:
Multiplexed Command,
Address, Data. If the
LPC_AD3 interface is not
used, the signals can be used
as GPIO Port 24.
LPC_FRAMEB/GPIOS_25
O
CMOS_V3P3
1
V3P3S
LPC Frame: (active low).
Output signal that indicates
the start of an LPC cycle or an
abort.
Note:
The LPC controller
does not implement
DMA or bus
mastering cycles.
If the LPC_FRAMEB interface
is not used, the signals can be
used as GPIO Port 25.
LPC_CLKOUT0/
GPIOS_26
O
CMOS_V3P3
1
V3P3S
LPC Clock: These signals are
the clocks driven by the
processor to the LPC devices.
Each clock can support up to
two loads.
Note:
If the primary boot
device is connected
via the LPC interface,
it should use
LPC_CLKOUT[0].
Using the LPC
interface for the boot
device is not
supported at this
time and may not
ever be supported by
this Intel product.
Only use the SPI
interface for boot
device connection.
If the LPC_CLKOUT0 interface
is not used, the signals can be
used as GPIO Port 26.